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Device Fabrication

The key steps of fabricating devices for carbon-based nanoelectronics are:

Microfabrication: Photolithography, Metalization etc.

To learn more about microfabrication processes look at http://en.wikipedia.org/wiki/Photolithography. The most important source of information is always the photoresist manufacture's data sheet (see the T: drive, Group documents\Photoresist documentation). There are also some good textbooks in the OSU library that cover all aspects of microfabrication:

  • “Fundamentals of Microfabrication” 2nd Ed. by Madou (excellent level of detail)
  • “The science and engineering of microelectronic fabrication” 2nd Ed. by Campbell (good overview)
  • “Introduction to microelectronic fabrication” by Jaeger

For some philosophy on how to make a good recipe you might enjoy reading the zen of device making.

Handling clean chips

All experimental physicists working in this field have to learn best practices for handling chips.

Mask design

CAD software is used to design and export the patterns needed for photolithography. In some cases you will need to export .dxf files, in other case .gds files. Josh uses AuotoCAD, this is powerful, industry standard software which is free for academic users. Ethan used DesignCAD (2D version) when he worked in Delft. Matt and Landon like to use Layout Editor which is free, open source software.

Chrome masks are patterned using the direct write lithography system on campus. Chrome masks allow us to reach the 2 micron resolution limit of the contact aligner. There are two write lenses (labeled 10 mm and 2 mm), with a 2 µm or 0.5 µm spot size respectively. For the 2 µm spot size, a mask can be exposed at a rate of 1 square inch every 20 minutes regardless of the amount of exposed area. Using the 0.5 um spot size the write time is on the order of 1 square inch every 1.5 hrs. The write times are fairly insensitive to the complexity of the pattern data. However, large arrays of repetitive shapes can take up to 5 times longer to expose than normally expected.

There is an OSU Cleanroom wiki describing operating procedures for the DWL.

DWL Costs
Laser time$9/hour
Mask blank$20
developer/etchant/stripper$26

Before the DWL was installed on campus we had to send CAD drawings to a mask making company. Commerically produced chrome masks cost $400 - 800 each.

Image of a chrome mask made with the DWL 2 µm spot size. The pink is chrome, the grey is transparent. More mask images.

For less demanding resolution, for example 10-20 micron minimum feature size, a printed transparency can be used. These masks cost about $60 each and are purchased from a company in Bandon. Now we prefer to make chrome masks in the DWL.

Some tips for a successful mask design:

  • start with an outline of the size of your substrate/chip. This can help you visualize and efficiently use chip space.
  • use text to label your mask (is it a part of a set? use “Mask 1/4”, etc. Also may include your name/lab name, date, the mask name, mask type. For example, “Carly Fengel, Minot Group, 8/2019, FDM Design #2, Graphene Mask, 2/3”)
  • minimize the total area occupied by the mask design and text to decrease write time. The mask writer will put a rectangle around the area containing your design and visit each pixel within that rectangle. The smaller this rectangle, the faster the write time (note that the write time is independent of how much of the mask is exposed vs how much is not).
  • include alignment marks for masks in a set. Think carefully about the positive and negative space for each layer; you need to be able to see the alignment mark on the chip underneath and the one on the current mask simultaneously.
  • if your mask is going to be mostly chrome with only small open regions, consider adding a clear outline a few mm thick around your design. Otherwise you won't be able to see the edges of the chip underneath which will make it difficult to print the design where you want it on the chip.
  • if your design is symmetric or on a clear substrate, put an “L” on your mask design large enough to see with the naked eye. This makes it easy to determine the orientation of the chip. I usually include this L on the electrode layer of the mask set so that it gets imprinted in metal on the chip.
  • use the metal layer to mark other useful features on the chip design. For example, you can label device sites with coordinates or letters, or use brackets to indicate the location of graphene sites to help create a “target” when transferring graphene to the chip.
  • You can make smaller “test” devices on the chip for experimental purposes.

Photolithography

We are using shared equipment in John Wager's lab to process our chips. The lab is in Owen Hall 4th floor West Wing. You can look through the big windows to see the impressive equipment. The lab is run by Chris Tasker, chris@eecs.oregonstate.edu. To use equipment in this lab you must be trained by someone in our group and then certified. Rick Presley is our main contact for certification, presley@engr.orst.edu.

The most important source of processing information is always the photoresist manufacture's data sheet (see the T: drive). For more technical advice you can also call from the photoresist company, MicroChem, (the company that distributes Shipley products). We have worked hard to get good/reliable recipes - some of the trials are documented.

Contact Aligner Walk Thru

See old_photolith_recipes

Photolithography Procedures (in OSU cleanroom)

(I) Spin-coating -For bilayer processing (metal deposition) complete all steps below -For single layer processing (graphene) skip steps 3 – 5

(1) Place chip on hotplate at 115 C for about 3 minutes to remove any residual water. Cool chip on cooling plate for 1 minute.

(2) Set spinner to 4000 RPM (ramp rate = 1000 R/s).

(3) Cleanly pipette P20 and drop onto chip; wait about 30 s. for solution to spread. Spin for 45 s.

(4) Cleanly pipette LOR onto center of chip. Immediately spin for 45 s.

(5) Place chip on hotplate at 190 C for 4 minutes (hard bake). Cool for 1 minute.

(6) Cleanly pipette S1813 onto center of chip. Immediately spin for 30 s.

(7) Place chip on hotplate at 115 C for 90 s (hard bake). Cool for 1 minute.

(II) Exposure

-Using Aligner in Owen 433 (The ECE-418 aligner broke)

(1) Check N2 and compressed air pressure (gauges near door; expect about 40 psi and 80 psi, respectively).

(2) Turn on N2, compressed air, and bulb. Set power to 350 W, constant power. Let bulb warm up for 15 minutes. Note: warning light will blink for about 1 minute. If it blinks longer the bulb needs to be replaced.

(3) Carefully insert mask, with purple (chrome) side facing sample. Add chip and align properly. Exposure time is 6-8 s. ~~Update Dublin 2022 ECE 418 aligner is no longer in use. The other aligner has about half the light power, around 15 mW/cm^2, requiring twice the exposure time (ECE418: 3-4 s. New aligner, 6-8 s.)

(4) After all exposures, remove mask. Turn off bulb but leave N2 on until system is cool (30 minutes). If necessary, clean mask with acetone/IPA.

(III) Development

-Note S1813 is a positive photo-resist so exposure breaks bonds, allowing it to be washed away with developer (1) Place chip in AZ300 bath for 20-45 s., constantly agitating. (Update Dublin 2022: 90s is consistently way too long for development. I find that 20s is almost always enough. Note that with LOR, you need to mnodify development time to fine_tuning your undercut thickness.)

(2) Remove from developer bath and put into water for 60 s while agitating. This stops the development so the exact time isn't imperative. (3) Dry with N2.

SU-8 Photoresist

  • SU-8 is a polymer like negative photoresist.
  • We use SU-8 in liquid gated GFETs as a passivation layer to protect metal leads from the gate electrolyte.
  • Read the SU-8 process guide for SU-8 2002 here.
  • This site has experimental information useful for trouble-shooting SU-8 processes.

Cross contamination

  • Be extremely careful when using CD-26 & MF-351 in the same lab. One drop of MF-351 in a gallon of CD-26 ruins the whole gallon! This problem was so bad that Shipley built a separate facility just to keep these away from each other.

Photoresist removal

Matt has documented that hot PG remover leaves less PR residue than any other method we have tried.

Ebeam lithography

Matt and Ethan have used the ebeam system at CAMCOR (University of Oregon, 50 minute drive). A basic recipe is available.

In September 2011 the new ebeam lithography system was installed in the OSU Electron Microscopy Facility. Doug Kezsler's group, and Inpria are currently the expert users.

Cleaving & Dicing Wafers

The initial photolithography steps are done on 3“ wafers. To grow nanotubes, however, we have to cleave the Si [1 0 0] wafer or ST-cut quartz into smaller pieces that will fit in our furnace. Matt is the expert when it comes to cleaving.

The only way to get truly square quartz pieces is to use a wafer dicing saw. There is one available in the OSU Cleanroom.

Metal deposition

Thermal evaporation

After doing photolithography, a thin layer of metal (tens of nanometers thick) is deposited on a nanotube chip. The interface between nanotube and metal is critical for device operation (for example, we do not store the chip in a gelpak before evaporation. This will lead to hydrocarbon contamination).

Our workhorse deposition system is the thermal evaporator in Janet Tate's lab, 4th floor Weniger Hall. We have used this system for chrome, gold, aluminum, and iron. Please see Matt Leyden for training. Always follow the standard operating procedure in a step by step fashion - missing one step can ruin your sample and the equipment. Matt and Josh renovated this evaporator in summer 2008.

Evaporation boats are made Tungstun and cost $6-8 each (R. D. Mathis). The boats should be kept clean and reused when possible.

Background info about thermal evaporation

Thin film deposition is monitored by a quartz crystal microbalance (QCM). The operator enters the density of the metal, the z-ratio of the metal and the tooling factor of the evaporator. Density and z-ratio can be looked up on a table. The tooling factor is a geometric factor, basically the ratio of the distance between source and QCM and the distance between the source and sample. When the QCM readings do not agree with AFM characterization of film thickness, users typically adjust the tooling factor.

For thermal evaporation, metal is usually held in a boat made out of Tungsten (W) because the melting point of W is 3422 °C. It is possible to break the boat by heating or cooling too fast. It is also bad for the sample if the temperature inside the evaporator gets too hot.

This evaporation table gives useful advice about which metals can be thermally evaporated. Similar information is on the Kurt Lesker website. For example,

  • Iron attacks W so thermal evaporation may not be possible.
  • Ti outgases when first heated.
  • Cr is available in rod form, so a boat is not necessary. Cr is a great sticking layer.
  • Pt and Au are both suitable for thermal evporation in a W boat, these metals do not stick well to an oxide surface.

Electron Beam Deposition

The clean room in Kelley has a new ebeam deposition system. Metals like iron & palladium which are difficult to evaporate thermally can be deposited with the ebeam system. Ask Josh Kevek for more information.

Deposition Alternative: Sputtering

Sputtering is an alternative to thermal evaporation that we have not yet explored. The deposition rate should be more stable. Milo Koretski has a beautiful new sputtering system set up in the chemical engineering department which he used for CNT catalyst deposition.

John Wager's group has an ebeam evaporator. E-beam evaporation is especially useful for metals that are hard to control or hard to melt, like iron and molybdenum.

Etching nanotubes

When making devices from aligned CNTs the unused tubes need to be etched. We currently use the O2 plasma in the Owen Hall clean room. This O2 plasma removes photoresist at a rate of about 100 nm/minute. The recipe from Rogers Nature Nanotech 2007 is 50 mTorr, 20 sccm O2, 30 W, 30 s.

More oxygen plasma details.

Other etching options

Vacuum Anneal

See here for the procedure to do this in our e-beam system. Annealing some kinds of nanotube devices in vacuum seems to decrease contact resistance, improve a leaky gate oxide, and remove surface contaminants. Starting in the ~0.01 mTorr range increase the temperature in increments of 100 C. When you get to 600 C, turn off the heater and allow the device to cool in vacuum to ~200 C before venting. So far, results suggest this improves resistances by ~80%. See the Phil Collin's paper for more information.

Cornell Nanofabrication Facility

User fees (March 2010)

  • One time fee for introductory training $420
  • Daily fee (covers chemical usage) $10
  • Mask making $100 for simple, $300 for complex
  • Photolithography on the stepper, $60 per hour
  • Metal evaporation, $60 per 2 hour session + $0.80 per nm of gold deposited
  • Reactive Ion Etching, $30 per hour, need about a 30 minute session to do 500 nm etch.

Device Fabrication: Updated January 2017

Overview of GFET Fabrication

(I) On SiO2 substrate (0) -Expose alignment marks on wafer (see: Photolithography Procedures). -Deposit Chromium using E-beam procedures (about 30 nm). -Place sample in PG-remover on hotplate at 65 C to remove photochemicals and excess metal. Leave for about 15 minutes. Using pipette to gently remove as much metal as possible while in solution. Transfer to fresh PG bath on hotplate. Leave overnight. Rinse with IPA and DI water, then dry with N2 to store. (1) Add prepared graphene to chip. (see Preparation of Graphene). Let dry overnight in covered dish. Soak in acetone overnight to remove PMMA. Rinse with IPA and DI water, dry with N2. (2) Spin-coat chip, expose device contacts using photolithography and develop (see: Photolithography Procedures). (3) Dep. Cr or Ti (1 nm) and Au (50 nm) using E-beam. (4) Place sample in PG-remover on hotplate at 60 C to remove photochemicals and excess metal. Leave for about 15 minutes. Using pipette to gently remove as much metal as possible while in solution. Transfer to fresh PG bath on hotplate. Leave overnight. Rinse with IPA and DI water, then dry with N2 to store. (5) Spin-coat chip, expose graphene using photolithography and develop (see: Photolithography Procedures). (6) Plasma-etch to remove excess graphene (see: Plasma Etch Procedures) (7) [optional: to isolate leads] Dep. SiO2 (50-100 nm) everywhere apart from contact regions. Place in PG-remover, following same procedure as for metal deposition.

(II) On glass cover slip (0) [optional: for releasable devices] Use chip with AlO3 already deposited. (1) Add prepared graphene to cover slip. (see: Preparation of Graphene). Let dry overnight in covered dish. Soak in acetone overnight to remove PMMA. Rinse with IPA and DI water, dry with N2. (2) Expose device contacts using lithography and develop (see: Photolithography Procedures). (3) Deposit Cr or Ti (1 nm) and Au (50 nm) using E-beam. (4) Place sample in PG-remover on hotplate at 60 C to remove photochemicals and excess metal. Leave for about 15 minutes. Using pipette to gently remove as much metal as possible while in solution. Transfer to fresh PG bath. Leave overnight. Rinse with IPA and DI water, then dry with N2 to store. (5) Expose graphene using photolithography and develop (see: Photolithography Procedures). (6) Plasma-etch to remove excess graphene (see: Plasma Etch Procedures).

Preparation of Graphene

(1) Cut graphene on copper (Cu) foil to desired size (the side with the graphene on it should be marked). (2) [Oksana’s lab] Spin PMMA (use 2% PMMA in anisole) onto graphene side. a. Turn on air and lights in fume hood; sign in for instrument use. b. Set spin coater to 3000 rpm for 60 s. Use chuck with small holes in top (not o-ring). c. Set Cu sample on chuck, with graphene side facing up, ensuring all holes are covered. Put chuck onto spin coater. d. Open PMMA in fume hood. Cleanly pipette several drops onto graphene. Press “vacuum”; close lid and begin spin coat. e. Carefully remove coated sample and store. (3) [Ethan’s lab] Hard-bake @ 90 C for 60 s. (4) Float in CE200, copper-side down, for about 8 hours. (5) Remove from solution using tongs and plate, and put into water bath (“water PMMA” label) for about 15 minutes. (6) Transfer to fresh DI water bath. Leave for at least 15 minutes (longer is acceptable). Repeat twice more. (7) Store graphene floating in water bath. (now the graphene still has a layer of PMMA on it ⇒ once graphene has dried overnight on substrate, remove PMMA by soaking in acetone overnight, followed with IPA and H2O rinse).

Plasma-etch Procedures

(last edit: 1/2/18 by Carly) (1) Place samples inside chamber. (2) Turn on plama-etcher (switch on back). (3) Press twice (starts power) (4) Toggle left or right to Setup menu, press Use settings: a. Vacuum set point 201.1 b. Atmospheric Vent 00:15 c. Purge Vent 00 d. Gas Stabilize 59 e. Vacuum Alarm 5:00 minutes Important! If the vacuum is not reached by this time limit, system shuts down. f. Plasma Time: 3:00 minutes (5) Press up to return to main menu. Select Commands. Select Plasma to begin process. (6) After timer runs out, go back to Commands menu, and select Off. (7) Remove samples from chamber.

device_making.1660086762.txt.gz · Last modified: 2022/08/09 16:12 by dublin