silicon_wafers
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silicon_wafers [2024/03/19 15:26] ethanminot |
silicon_wafers [2024/03/19 15:50] (current) ethanminot |
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| We current use p+ doped silicon, [1 0 0] with 200 nm thermally grown oxide. The [1 0 0] refers to the crystallographic axis of the vector normal to the surface. [1 0 0] wafers will break into squares. | We current use p+ doped silicon, [1 0 0] with 200 nm thermally grown oxide. The [1 0 0] refers to the crystallographic axis of the vector normal to the surface. [1 0 0] wafers will break into squares. | ||
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| + | In March 2024 we ordered a batch of wafers from Nova: P-type (boron) 0.01-0.02 ohm-cm; 300 nm wet thermal oxide; Prime grade. The resistivity is below 0.04 ohm-cm, which indicates "degenerately doped" silicon. Degenerate doping will remain conducting even below 1 kelvin. | ||
| There are 3 wafer grades: test (lowest grade), prime and epi (highest grade). | There are 3 wafer grades: test (lowest grade), prime and epi (highest grade). | ||
silicon_wafers.txt · Last modified: 2024/03/19 15:50 by ethanminot
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