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device_making [2019/09/09 20:40] – created ethanminotdevice_making [2022/09/13 11:23] (current) – dublin
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 The key steps of fabricating devices for carbon-based nanoelectronics are: The key steps of fabricating devices for carbon-based nanoelectronics are:
-  *[[graphene fabrication|graphene growth and transfer]] +  *[[graphene fabrication|Graphene growth and transfer]] 
-  *[[nanotube growth]]+  *[[Nanotube growth]] 
 +  *[[Photolithography]] 
 +  *[[ebeam_litho|E-beam lithography at OSU]] 
 +  *[[ebeam_recipe|E-beam lithography at UO]]
   *Microfabrication (see below)   *Microfabrication (see below)
  
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 {{::hold_chip_on_edge.jpg?180|}} {{::hold_chip_on_edge.jpg?180|}}
 All experimental physicists working in this field have to learn [[best practices for handling chips]]. All experimental physicists working in this field have to learn [[best practices for handling chips]].
 +
 +
 +===== Photolithography =====
 +
 +Uses chrome masks to expose photoresist. See [[Photolithography]]
  
 ===== Mask design ===== ===== Mask design =====
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 ^DWL Costs^ | ^DWL Costs^ |
-|Laser time|$6/hour| +|Laser time|$9/hour| 
-|Mask blank|$12| +|Mask blank|$20| 
-|developer/etchant/stripper| $18|+|developer/etchant/stripper|$26|
  
 Before the DWL was installed on campus we had to send CAD drawings to a [[purchasing supplies|mask making company]]. Commerically produced chrome masks cost $400 - 800 each.  Before the DWL was installed on campus we had to send CAD drawings to a [[purchasing supplies|mask making company]]. Commerically produced chrome masks cost $400 - 800 each. 
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 For less demanding resolution, for example 10-20 micron minimum feature size, a [[mylar masks|printed transparency]] can be used. These masks cost about $60 each and are purchased from a company in Bandon. Now we prefer to make chrome masks in the DWL. For less demanding resolution, for example 10-20 micron minimum feature size, a [[mylar masks|printed transparency]] can be used. These masks cost about $60 each and are purchased from a company in Bandon. Now we prefer to make chrome masks in the DWL.
-=====Photolithography===== 
-We are using shared equipment in John Wager's lab to process our chips. The lab is in Owen Hall 4th floor West Wing. You can look through the big windows to see the impressive equipment. The lab is run by Chris Tasker, chris@eecs.oregonstate.edu. To use equipment in this lab you must be trained by someone in our group and then certified. Rick Presley is our main contact for certification, presley@engr.orst.edu. 
  
-The most important source of processing information is always the photoresist manufacture's data sheet (see the T: drive). For more technical advice you can also call from the photoresist company, [[http://www.microchem.com/|MicroChem]], (the company that distributes Shipley products). We have worked hard to get good/reliable recipes - some of the trials are [[fine tuning|documented]].+Some tips for a successful mask design: 
 +  * start with an outline of the size of your substrate/chip. This can help you visualize and efficiently use chip space. 
 +  * use text to label your mask (is it a part of a set? use "Mask 1/4", etc. Also may include your name/lab name, date, the mask name, mask type. For example, "Carly Fengel, Minot Group, 8/2019, FDM Design #2, Graphene Mask, 2/3") 
 +  * minimize the total area occupied by the mask design and text to decrease write time. The mask writer will put a rectangle around the area containing your design and visit each pixel within that rectangle. The smaller this rectangle, the faster the write time (note that the write time is independent of how much of the mask is exposed vs how much is not). 
 +  * include alignment marks for masks in a set. Think carefully about the positive and negative space for each layer; you need to be able to see the alignment mark on the chip underneath and the one on the current mask simultaneously. 
 +  * if your mask is going to be mostly chrome with only small open regions, consider adding a clear outline a few mm thick around your design. Otherwise you won't be able to see the edges of the chip underneath which will make it difficult to print the design where you want it on the chip.  
 +  * if your design is symmetric or on a clear substrate, put an "L" on your mask design large enough to see with the naked eye. This makes it easy to determine the orientation of the chip. I usually include this L on the electrode layer of the mask set so that it gets imprinted in metal on the chip. 
 +  * use the metal layer to mark other useful features on the chip design. For example, you can label device sites with coordinates or letters, or use brackets to indicate the location of graphene sites to help create a "target" when transferring graphene to the chip.  
 +  * You can make smaller "test" devices on the chip for experimental purposes.
  
-[[Contact Aligner Walk Thru]] 
- 
-=== Photoresist processing recipe === 
-//(updated 04-08-2010)// 
-  *5 min dehydration bake 190°C 
-  *spin LOR3B photoresist at 4000 rpm for 45 sec (//bilayer process only//) 
-    * Deposits ~250 nm of photoresist (according to LOR3B documentation) 
-    * ideal LOR3B thickness = 1.25*metal thickness 
-    * //Skip this step for single layer process// 
-  *4 min softbake 190°C (//bilayer process only//) 
-    * //Skip this step for single layer process// 
-  *spin S1813 photoresist at 4000 rpm for 30 sec 
-  *2 min softbake 115°C 
-  *6 sec exposure 
-  *45 sec develop 
-    * Developing solution: 4 parts DI H20, 1 part Shipley Mircoposit MF-351 
-    * Gently agitate substrate in developer bath. Afterward, gently spray rinse DI H2O followed by a quick dunk in a DI H20 bath with some agitation. 
-  *deposit 35nm metal 
-  *remove underlayer with mircoposit 1165 (located in Weniger 306 lab) 
-    * Put chips in 60°C remover for 30 min 
-    * Transfer to fresh 60°C remover for 30 min 
-  *rinse DI H20 then blow dry 
-    * Never rinse chip with acetone while LOR3B or it's residue is still on the chip! The LOR3B combines with acetone to form a sludge that can only be removed by scraping! 
- 
-===Other recipes===  
-  *[[Pre-2010 Recipes]] 
-  *[[Eric Sundholm's Recipe]] 
- 
-===Cross contamination===  
-  * Be extremely careful when using CD-26 & MF-351 in the same lab. One drop of MF-351 in a gallon of CD-26 ruins the whole gallon! This problem was so bad that Shipley built a separate facility just to keep these away from each other. 
- 
-===Photoresist removal=== 
-Matt has documented that hot PR remover leaves less PR residue than any other method we have tried.  
  
 ===== Ebeam lithography ===== ===== Ebeam lithography =====
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 In September 2011 the new ebeam lithography system was installed in the OSU Electron Microscopy Facility. Doug Kezsler's group, and Inpria are currently the expert users. In September 2011 the new ebeam lithography system was installed in the OSU Electron Microscopy Facility. Doug Kezsler's group, and Inpria are currently the expert users.
 +
 ===== Cleaving & Dicing Wafers ===== ===== Cleaving & Dicing Wafers =====
 The initial photolithography steps are done on 3" wafers. To grow nanotubes, however, we have to [[ The initial photolithography steps are done on 3" wafers. To grow nanotubes, however, we have to [[
 http://www.ee.byu.edu/cleanroom/everything_wafers.phtml|cleave]] the Si [1 0 0] wafer or ST-cut quartz into smaller pieces that will fit in our furnace. Matt is the expert when it comes to cleaving.  http://www.ee.byu.edu/cleanroom/everything_wafers.phtml|cleave]] the Si [1 0 0] wafer or ST-cut quartz into smaller pieces that will fit in our furnace. Matt is the expert when it comes to cleaving. 
  
-The only way to get truly square quartz pieces is to use a wafer dicing saw. Pallavi Dhagat has used [[http://www.wafer-dicing.com/index.htm|American Precision Dicing Inc]]. The cost is a minimum of $150. +The only way to get truly square quartz pieces is to use a wafer dicing saw. There is one available in the OSU Cleanroom. 
 ===== Metal deposition ===== ===== Metal deposition =====
 ===Thermal evaporation=== ===Thermal evaporation===
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 Thin film deposition is monitored by a [[http://en.wikipedia.org/wiki/Quartz_crystal_microbalance|quartz crystal microbalance]] (QCM). The operator enters the density of the metal, the z-ratio of the metal and the tooling factor of the evaporator. Density and z-ratio can be looked up on a [[http://www.ee.byu.edu/cleanroom/TFE_materials.phtml|table]]. The tooling factor is a geometric factor, basically the ratio of the distance between source and QCM and the distance between the source and sample.  When the QCM readings do not agree with AFM characterization of film thickness, users typically adjust the tooling factor. Thin film deposition is monitored by a [[http://en.wikipedia.org/wiki/Quartz_crystal_microbalance|quartz crystal microbalance]] (QCM). The operator enters the density of the metal, the z-ratio of the metal and the tooling factor of the evaporator. Density and z-ratio can be looked up on a [[http://www.ee.byu.edu/cleanroom/TFE_materials.phtml|table]]. The tooling factor is a geometric factor, basically the ratio of the distance between source and QCM and the distance between the source and sample.  When the QCM readings do not agree with AFM characterization of film thickness, users typically adjust the tooling factor.
  
-For thermal evapoartion, metal is usually held in a boat made out of Tungsten (W) because the melting point of W is 3422 °C. It is possible to break the boat by heating or cooling too fast. It is also bad for the sample if the temperature inside the evaporator gets too hot. +For thermal evaporation, metal is usually held in a boat made out of Tungsten (W) because the melting point of W is 3422 °C. It is possible to break the boat by heating or cooling too fast. It is also bad for the sample if the temperature inside the evaporator gets too hot. 
  
 This [[http://www.ee.byu.edu/cleanroom/TFE_materials.phtml|evaporation table]] gives useful advice about which metals can be thermally evaporated. Similar information is on the [[http://www.lesker.com|Kurt Lesker]] website. For example, This [[http://www.ee.byu.edu/cleanroom/TFE_materials.phtml|evaporation table]] gives useful advice about which metals can be thermally evaporated. Similar information is on the [[http://www.lesker.com|Kurt Lesker]] website. For example,
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   *Reactive Ion Etching, $30 per hour, need about a 30 minute session to do 500 nm etch.   *Reactive Ion Etching, $30 per hour, need about a 30 minute session to do 500 nm etch.
  
-======Device Fabrication: Updated January 2017======+====== Other Device Fabrication: Updated January 2017======
  
 ==Overview of GFET Fabrication== ==Overview of GFET Fabrication==
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-==Photolithography Procedures (in OSU cleanroom)== +
-(I) Spin-coating +
--For bilayer processing (metal deposition) complete all steps below +
--For single layer processing (graphene) skip steps 3 – 5 +
-(1) Place chip on hotplate at 115 C for about 3 minutes to remove any residual water. Cool chip on cooling plate for 1 minute. +
-(2) Set spinner to 4000 RPM (ramp rate = 1000 R/s). +
-(3) Cleanly pipette P20 and drop onto chip; wait about 30 s. for solution to spread. Spin for 45 s. +
-(4) Cleanly pipette LOR onto center of chip. Immediately spin for 45 s. +
-(5) Place chip on hotplate at 190 C for 4 minutes (hard bake). Cool for 1 minute. +
-(6) Cleanly pipette S1813 onto center of chip. Immediately spin for 30 s. +
-(7) Place chip on hotplate at 115 C for 90 s (hard bake). Cool for 1 minute. +
-(II) Exposure +
--Using ECE418 aligner +
-(1) Check N2 and compressed air pressure (gauges near door; expect about 40 psi and 80 psi, respectively).  +
-(2) Turn on N2, compressed air, and bulb. Set power to 350 W, constant power. Let bulb warm up for 15 minutes. Note: warning light will blink for about 1 minute. If it blinks longer the bulb needs to be replaced.  +
-(3) Carefully insert mask, with purple (chrome) side facing sample. Add chip and align properly. Exposure time is 3 – 4 s. +
-(4) After exposure, remove mask. Turn off bulb but leave N2 on until system is cool (30 minutes). If necessary, clean mask with acetone/IPA.   +
-(III) Development +
--Note S1813 is a positive photo-resist so exposure breaks bonds, allowing it to be washed away with developer +
-(1) Place chip in AZ300 bath for 90 s., constantly agitating.  +
-(2) Remove from developer bath and put into water for 60 s, agitating. +
-(3) Dry with N2. +
    
 ==Plasma-etch Procedures== ==Plasma-etch Procedures==
device_making.1568086854.txt.gz · Last modified: 2019/09/09 20:40 by ethanminot